Flash Microcontrollers Performance Raise Above 200 MIPS
News from Atmel
“AT91SAM9XE 32-bit Microcontrollers Integrate Flash, SRAM and Boot ROM with USB Host/Device, Ethernet, Multiple Serial Interfaces and DMA for Maximum Performance, Connectivity, and Data Bandwidth
Atmel Corporation, announced today the sampling of the AT91SAM9XE-series, the first generation of monolithic ARM9-based Flash microcontrollers that combines a 200-MIPS ARM926EJ-S™ processor core with up to 512K bytes of high-performance on-chip Flash. The new device offers an unrivalled combination of performance and functionality on a single chip, making these Flash microcontrollers ideal for space-constrained applications where high performance is required.
Smooth migration from ARM7 to ARM9-based Flash Microcontrollers. The SAM9XE-series is designed to reuse the maximum of the peripherals and technology developed for Atmel’s ARM7™-based SAM7 family. In addition, the same support infrastructure is used for both the SAM7 and the new SAM9XE-series, making the migration between both microcontroller families smooth and easy.
Multiple Networking/Connectivity Options. The SAM9XE provides multiple networking/connectivity options with on-chip USB 2.0 Full Speed Host and Device Ports, an Ethernet 10/100 Base-T MAC as well as a two-slot Multimedia Card Interface (SDCard/SDIO and MultiMediaCard Compliant), a Synchronous Serial Controller (SSC), four USARTs, two master/slave Serial Peripheral Interfaces (SPI), a debug UART and two Two Wire Interfaces (TWI).
Distributed DMA for Optimal Internal Data Bandwidth. The six-layer system bus matrix is linked to the Memory Management Unit of the processor core, as well as to distributed DMA channels on the USB Host, Ethernet and Image Sensor Interface to ensure uninterrupted internal data flows with minimum processor overhead. This concept is extended to peripherals via the Peripheral DMA Controller (PDC) that communicates with DMA interfaces on the USB Device and all other serial I/Os. This industry-leading distributed DMA architecture ensures that internal data transfers occur at maximum possible bandwidth with minimal processor intervention. It enables the SAM9XE to perform complex data processing at the same time as high-speed data transfers.”
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